An Analog-to-Information VGA image sensor architecture for support vector machine on compressive measurements

authors

• Benjilali Wissam
• Guicquero William
• Jacques Laurent
• Sicard Gilles

keywords

• Embedded object recognition
• Compressive sensing
• Pseudo-random permutations
• Sigma-Delta
• SVM

abstract

This work presents a compact VGA (480 × 640) CMOS Image Sensor (CIS) architecture with dedicated end-ofcolumn Compressive Sensing (CS) scheme allowing embedded object recognition. The architecture takes advantage of a lowfootprint pseudo-random data mixing circuit and a first order incremental Sigma-Delta (Σ∆) Analog to Digital Converter (ADC) to extract compressed features. The proposed CIS achieves an object recognition accuracy of ' 93% on the Georgia Tech face recognition database (GIT, 10 classes out of 50) thanks to a linear Support Vector Machine (SVM) classifier implemented by an optimized Digital Signal Processing (DSP). We stress that the signal independent dimensionality reduction performed by our dedicated CS scheme (1/480) allows to dramatically reduce memory requirements (≈ 32 kbit) related –in our case– to the ex-situ learned affine function of the linear SVM.

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